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gs1524a adaptive cable equalizer 1 of 16 gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 www.gennum.com features ? smpte 292m, smpte 344m and smpte 259m compliant ?automatic cable equalization ? multi-standard operation from 143mb/s to 1.485gb/s ? supports dvb-asi at 270mb/s ? pb-free and rohs compliant ? pin compatible with th e gs9064 cable equalizer ? manual bypass (useful for low data rates with slow rise/fall times) ? performance op timized for 270mb/s and 1.485gb/s ? typical equalized length of belden 1694a cable: 200m at 1.485gb/s, 350m at 270mb/s ?50 differential output (with internal 50 pull-ups) ? manual output mute or programmable mute based on max cable length adjust ? cable length indicator for smpte 259m inputs ? single 3.3v power supply operation ? operating temperature range: 0c to +70c applications ? smpte 292m, smpte 344m and smpte 259m coaxial cable serial digital interfaces. description the gs1524a is a second-gener ation high-spe ed bicmos integrated circuit designed to equalize and restore signals received over 75 co-axial cable . the gs1524a is designed to support smpte 292m, smpte 344m and smpte 259m, and is optimized for performance at 270mb/s and 1.485gb/s. the gs1524a features dc rest oration to compensate for the dc content of smpte pathological test patterns. the device also incorporates a cable length indicator (cli) that provides an indication of the amount of cable being equalized for data rates up to 360mb/s. a voltage programmable mute threshold (mcladj) is included to allow muting of the gs1524a output when an approximate selected cable length is reached for smpte 259m signals. this featur e allows the gs1524a to distinguish between low amplitude sd-sdi signals and noise at the input of the device. the bidirectional cd /mute pin indicates the presence of a valid signal at the input of the gs1524a in addition to functioning as a mute control input. the outputs of the gs1524a will be forc ed to a mute state when an invalid input reference signal is applied to the input of the device or the application layer sets the cd /mute pin high. if the application layer forces cd /mute low, the serial digital output of the device will always be active. power consumption is typically 265mw using a 3.3v power supply. the gs1524a is pb-free, and th e encapsulation compound does not contain halogenated flame retardant (rohs compliant).
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 2 of 16 gs1524a functional block diagram revision history cable length indicator/adjustor carrier detect mute equalizer dc restore output agc cli cd/mute sdo bypass sdo sdi sdi mcladj version ecr pcn date changes and/or modifications 6 152097 ? j une 2009 removed ?proprietary & c onfidential? from footer. updated document format. 5 147547 ? s eptember 2007 c orrected p/n in ordering information . 4 147532 ? s eptember 2007 added p/n to ordering information . 3 141578 40438 august 2006 added 200m output cable length jitter data at 1.485 g b/s in a c electrical c haracteristics and clarified 0m cable length input voltage swing condition. modified 200m cable length in features section and detailed description . 2 137826 ? august 2005 c orrected process to bi c mo s . 1 136832 ? may 2005 updated document status to data s heet. updated all ? g reen? references to say ?roh s c ompliant?. c larified naming of solder reflow profiles and re-ordered profiles to show preference for pb-free profile. removed ?proprietary and c onfidential? footer. c orrected minor typing errors. 0 135247 ? december 2004 c hanged to preliminary data s heet. removed references to gs 9064a. updated a c , d c and absolute maximum ratings tables. adde d solder reflow profiles. added packaging data information. c orrected minor typing errors. a 131284 ? march 2004 new document.
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 3 of 16 contents features....................................................................................................................... ..........................................1 applications................................................................................................................... ......................................1 description.................................................................................................................... .......................................1 revision history ............................................................................................................... ..................................2 1. pin out..................................................................................................................... ..........................................4 1.1 gs1524a pin assignment .................................................................................................... ..........4 1.2 gs1524a pin descriptions .................................................................................................. ...........5 2. electrical characteristics .................................................................................................. ..........................6 2.1 absolute maximum ratings .................................................................................................. ........6 2.2 dc electrical characteristics ...... ....................................................................................... ...........6 2.3 ac electrical characterist ics ............................................................................................. ...........7 3. input / output circuits ..................................................................................................... ...........................9 4. detailed description........................................................................................................ .......................... 10 4.1 serial digital inputs ..................................................................................................... ................. 11 4.2 cable equalization ........................................................................................................ ................ 11 4.3 programmable mute output and cable length indicator ............................................... 11 4.4 mute and carrier detect ................................................................................................... ........... 12 5. application information ..................................................................................................... ..................... 13 5.1 pcb layout ................................................................................................................ ....................... 13 5.2 typical application circuits ............................. ................................................................. ........ 13 6. package & ordering information .............................................................................................. ............ 14 6.1 package dimensions ........................................................................................................ ............. 14 6.2 packaging data ............................................................................................................ ................... 14 6.3 solder reflow profiles .................................................................................................... .............. 15 6.4 ordering information ...................................................................................................... ............. 16
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 4 of 16 1. pin out 1.1 gs1524a pin assignment figure 1-1: 16-pin s oi c cli v cc v ee sdi sdi v ee agc+ agc- cd/mute v cc v ee sdo sdo v ee mcladj bypass gs1524a 1 2 3 4 5 6 7 8 1 6 15 14 13 12 11 10 9 (top view)
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 5 of 16 1.2 gs1524a pin descriptions table 1-1: gs1524a pin descriptions pin number name timing ty p e description 1 c li analog output c able length indicator. an analog voltage will be output proportional to the cable length connected to the serial digital input. note: c li is recommended for data rates up the 360mb/s only. 2, 15 v cc analog power most positive power supply connection. c onnect to +3.3v d c . 3, 6, 11, 14 v ee analog power most negative power supply connection. c onnect to g nd. 4, 5 s di, s di analog input s erial digital differential input. 7, 8 a gc +, a gc - analog ? external a gc capacitor. c onnect pin 7 and pin 8 together through a 1uf capacitor. 9bypa ss not s ynchronous input forces the equalizing and d c re s tore stages into bypass mode when hi g h. no equalization occurs in this mode. 10 m c lad j analog input maximum cable length adjust. adjusts the approximate maximum amount of cable to be equalized (from 0m to the maximum cable length). the output is muted (latched to the last state) when the maximum cable length is achieved. note: m c lad j is only recommended for data rates up to 360mb/s. 12, 13 s do , s do analog output equalized serial digital differential output. 16 c d /mute not s ynchronous bidirectiona l s tatu s s i g nal output / c ontrol s i g nal input levels are lv c mo s /lvttl compatible. output ( c d ): indicates the presence of a valid input signal. when the c d pin is low, a valid input signal has been detected. when this pin is hi g h, the input signal is invalid. if c d is set hi g h, the serial digital output of the device will be forced to a steady state (latched to the last state). note: this pin will indicate loss of carrier for data rates > 19mb/s. input (mute): when the mute pin is set hi g h by the application interface, the serial digital output of the device will be forced to a steady state (latched to the last state). when the mute pin is set low, the serial digital output of the device will be active. note: the c d /mute pin is not functional when bypa ss is set hi g h.
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 6 of 16 2. electrical characteristics 2.1 absolute maximum ratings 2.2 dc electrical characteristics parameter value s upply voltage -0.5v to +3.6 v d c input e s d voltage 2kv s torage temperature range -50 c < t s < 125 c input voltage range (any input) -0.3 to (v cc +0.3)v operating temperature range 0 c to 70 c s older reflow temperature 260 c table 2-1: dc electrical characteristics v cc = 3.3v 5%, t a = 0 c to 70 c , unless otherwise shown parameter symbol conditions min ty p max units notes s upply voltage v cc ? 3.135 3.3 3.465 v 5% power c onsumption p d t a = 25 c ? 265 ? mw ? s upply c urrent i s t a = 25 c ?80?ma? output c ommon mode voltage v c mout t a = 25 c ?v cc - v s do /2 ? v ? input c ommon mode voltage v c min t a = 25 c ?1.75?v? c li d c voltage (0m) ? t a = 25 c ?2.5?v? c li d c voltage (no signal) ? t a = 25 c ?1.9?v? m c lad j d c voltage (to mute signal) ?0m, t a = 25 c ?1.3?v? m c lad j range ? t a = 25 c ?0.69?v? c d /mute output voltage v c d /mute(oh) c arrier not present 2.4 ? ? v ? v c d /mute(ol) c arrier present ? ? 0.4 v ?
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 7 of 16 2.3 ac electrical characteristics c d /mute input voltage required to force outputs to mute v c d /mute mute 2.0 ? ? v ? c d /mute input voltage required to force outputs active v c d /mute activate ? ? 0.8 v ? table 2-1: dc electrical characteristics (continued) v cc = 3.3v 5%, t a = 0 c to 70 c , unless otherwise shown parameter symbol conditions min ty p max units notes table 2-2: ac electrical characteristics v cc = 3.3v 5%, t a = 0 c to 70 c , unless otherwise shown parameter symbol conditions min ty p max units notes s erial input data rate dr s do gs 1524a 143 ? 1485 mb/s ? input voltage s wing v s di t a =25 c , at transmitter 720 800 950 mv p-p 0m cable length output voltage s wing v s do 50 load, t a =25 c , differential ?750?mv p-p ? output j itter for various c able lengths and data rates ? 270mb/s belden 1694a: 0-350m belden 8281: 0-280m ? 0.2 ? ui 1,4 ? 1.485 g b/s belden 1694a: 0-140m belden 8281: 0-100m ?0.25? ui 1,4 ? 1.485 g b/s belden 1694a: 140-200m ? 0.3 ? ui 3,4 output rise/fall time ? 20% - 80% ? 80 220 ps ? mismatch in rise/fall time ? ? ? ? 30 ps ? duty cycle distortion ? ? ? ? 30 ps ? overshoot ? ? ? ? 10 % ? input return loss ? ? 15 ? ? db 2 input resistance ? single ended ? 1.64 ? k ? input c apacitance ? single ended ? 1 ? pf ?
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 8 of 16 figure 2-1: test c ircuit output resistance ? single ended ? 50 ? ? note s : 1. all parts production tested. in order to guarantee jitter over the full range of specification (v cc = 3.3v 5%, t a = 0c to 70c, and 720-880mv launch swing from the sd i cable driver) the reco mmended applications circuit must be used. 2. tested on cb1524 board from 5mhz to 2ghz. 3. based on characterization data using the recommended applications circuit, at v cc = 3.3v, t a = 25c, and 800mv launch swing from the sdi cable driver. 4. equalizer pathological test signal is used. table 2-2: ac electrical characteristics (continued) v cc = 3.3v 5%, t a = 0 c to 70 c , unless otherwise shown parameter symbol conditions min ty p max units notes gi g abert 1400 ext. clock clock out data out ext. clock 1.485ghz/270mhz gs1524a test board tds 820 ch. 1 ch. 2 out in out ext. trigger 50/75 8281 or 1 6 94a cable
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 9 of 16 3. input / output circuits figure 3-1: input equivalent c ircuit figure 3-2: m c lad j equivalent c ircuit figure 3-3: output c ircuit 3k 3. 6 k 3k 3. 6 k rc sdi sdi v cc mcladj 12k 150 + - 50 50 sdo sdo
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 10 of 16 figure 3-4: c li output c ircuit figure 3-5: c d /mute c ircuit figure 3-6: bypass c ircuit 4. detailed description the gs1524a is a high speed bi cmos ic designed to equalize serial digital signals. the gs1524a can equalize both hd and sd serial digital signals, and will typically equalize 200m of belden 1694a cable at 1. 485gb/ s and 350m at 270mb/s. the gs1524a/ is powered from a single +3.3v power supply and consumes approximately 265mw of power. 10k 10k v cc cli - + cd/mute bypass
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 11 of 16 4.1 serial digital inputs the serial data signal may be connected to the input pins (sdi/sdi ) in either a differential or single ended configuration. ac coupling of the inputs is recommended, as the sdi and sdi inputs are internally biased at approximately 1.8v. 4.2 cable equalization the input signal passes through a variable gain equalizing stage whose frequency response closely matches the inverse of the cable loss characteristic. in addition, the variation of the frequency response with control voltage imitates the variation of the inverse cable loss characteristic with cable length. the edge energy of the equalized signal is monitored by a detector circuit which produces an error signal corresponding to the difference between the desired edge energy and the actual edge energy. this error signal is integrated by both an internal and an external agc filter capacitor providing a st eady control voltage fo r the gain stage. as the frequency response of the gain stage is automatically varied by the application of negative feedback, the edge energy of the equalized signal is kept at a constant level which is representative of the original edge energy at the transmitter. the equalized signal is also dc restored, effectively restoring the logic threshold of the equalized signal to its correct level independent of shifts due to ac coupling. the digital output signals have a nominal voltage of 750mv pp differential, or 375mv pp single ended when terminated with 50 as shown in figure 4-1 . figure 4-1: typical output voltage levels 4.3 programmable mute output and cable length indicator for smpte 259m inputs, the gs 1524a incorporates a progra mmable threshold output mute (mcladj) and an analog cable length indicator (cli). 50 50 sdo sdo +187.5mv -187.5mv v cm = 2.925v typi c al +187.5mv -187.5mv v cm = 2.925v typi c al
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 12 of 16 mcladj in applications where there are multiple input channels using the gs1524a, it is advantageous to have a programmable mute output to avoid signal crosstalk. the output of the gs1524a can be muted wh en the input signal decrease s below a certain input level. this threshold is determined using the input voltage applied to the mcladj pin. the mcladj pin may be left unconnected for applications where output muting is not required. this feature has been designed for use in applications such as routers where signal crosstalk and circuit noise cause the equalizer to output erroneous data when no input signal is present. the use of a carrier detect function with a fixed internal reference does not solve this problem since the signal to noise ratio on the circuit board could be significantly less than the default signal detection level set by the on chip reference. note: mcladj is only recommended for data rates up to 360mb/s. cli the output voltage of the cli pin is an appr oximation of the amount of cable present at the gs1524a input. with 0m of cable, 800mv input signal levels, and a data rate of 270mb/s, the cli output voltage is approximately 2.5v. as th e cable length increases, the cli voltage decreases providing an approximate correlation between the cli voltage and cable length. note: cli is only re commended for data rates up to 360mb/s. 4.4 mute and carrier detect in addition to the programm able mute output and cable length indicator, the gs1524a includes a multi-function cd /mute bidirectional pin that provides the following functions: input (mute) applying a high input to the cd /mute pin forces the gs1524a outputs to a muted condition. the minimum voltage required to force the outputs to a muted condition is listed in the dc electrical characteristics table. in this condition the outputs will be latched to the last logic level present at the output to avoid signal crosstalk. applying a low input to the cd /mute pin will force the gs 1524a outputs to remain active regardless of the length of input cabl e and the voltage applied to the mcladj pin. see the dc electrical characteristics table for voltage levels. output (cd ) when used as an output, the cd /mute pin will indicate the presence of a valid input signal. when cd /mute is low, a valid input signal ha s been detected at the input of the device. when cd /mute is high, the input signal is invalid. this pin will indicate loss of carrier for data rates greater than 19mb/s. note: the cd /mute pin is not functional in bypass mode.
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 13 of 16 5. application information 5.1 pcb layout special attention must be paid to compon ent layout when desi gning serial digital interfaces for hdtv. an fr-4 dielectric can be used, however, controlled impedance transmission lines are required for pcb traces longer than approximately 1cm. note the following pcb artwork features used to optimize performance: ? pcb trace width for hd rate signals is closely matched to smt component width to minimize reflections due to change in trace impedance. ? the pcb ground plane is removed under the gs1524a input components to minimize parasitic capacitance. ? the pcb ground plane is removed under the gs1524a output components to minimize parasitic capacitance. ? high speed traces are curved to minimize impedance changes. 5.2 typical application circuits figure 5-1: gs 1524a typical application c ircuit 6 .4n 10n bypass mcladj 75 sdo bnc vcc cli 1u 10n 75 4u7 4u7 gs1524a 4 5 1 6 6 2 12 13 3 11 14 15 8 + + + 9 10 1 7 sdi sdi cd/mute vee vcc sdo sdo vee vee vee vcc agc- bypass mcladj cli agc+ 1u sdo cd/mute 37.4 1u vcc note: all resistors in ohms, c apa c itors in fara d s, an d in d u c tors in henrys, unless otherwise note d .
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 14 of 16 6. package & ordering information 6.1 package dimensions 6.2 packaging data symbol a a1 a2 b c d e e h l1 l y min. min. max. max. nom. nom. millimeter inch * controlling dimension: mm 1.35 0.10 1.30 0.33 0.19 9.80 3.80 5.80 0.40 0 1.63 0.15 1.40 0.41 9.91 3.90 1.27 6.00 0.64 1.07 1.75 0.25 1.50 0.51 0.25 10.01 4.00 0.053 0.004 0.051 0.013 0.064 0.006 0.055 0.016 0.390 0.154 0.50 0.069 0.010 0.059 0.020 0.010 0.394 0.157 0 8 8 6.20 1.27 0.10 0.004 0.042 0.025 0.016 0.228 0.236 0.244 0.050 0.150 0.386 0.007 d e seating plane a2 a a1 y see detail f l1 c detail f l gauge plane 0.010" h e 8 1 16 9 b parameter value package type s oi c 16l package drawing reference j ede c m s 012 moisture s ensitivity level 2 j unction to air thermal resistance, j-a (at zero airflow) 94.1 c /w pb-free and roh s c ompliant yes
gs1524a adaptive cable equalizer data sheet 28852 - 5 june 2009 15 of 16 6.3 solder reflow profiles the device is manufactured with matte-sn terminations and is compatible with both standard eutectic and pb-free solder reflow profiles. msl qualification was performed using the maximum pb-free reflow profile shown in figure 6-1 . the recommended standard pb reflow profile is shown in figure 6-2 . figure 6-1: maximum pb-free s older reflow profile (preferred) figure 6-2: s tandard pb s older reflow profile 25c 150c 200c 217c 2 6 0c 250c time temperature 8 min. max 6 0-180 se c . max 6 0-150 se c . 20-40 se c . 3c/se c max 6 c/se c max 25c 100c 150c 183c 230c 220c time temperature 6 min. max 120 se c . max 6 0-150 se c . 10-20 se c . 3c/se c max 6 c/se c max
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